Bingyi Zhang

University of Southern California, FPGA/PARALLEL COMPUTING LAB

bingyi.jpg

EEB 244

3740 McClintock Ave

Los Angeles, CA 90089

I am a fifth-year Ph.D. candidate in the Ming Hsieh Department of Electrical Engineering at USC. Currently, I am under the advisement of professor Viktor K. Prasanna. My research interest is high performance computing (HPC), computer architecture, reconfigurable computing, graph machine learning and VLSI. Currently, I focus on sparse linear algebra acceleration on FPGA and graph neural network acceleration on FPGA.

Before I joined USC, I persued my master degree at State Key Laboratory of ASIC and System at Fudan Universty, under the guidance of Professor Jun Han and Professor Xiaoyang Zeng.

*I am glad to serve as a reviewer for journal or conference papers, as well as a TPC member for conference or workshop, in the area of High Performance Computing, Reconfigurable Computing, Circuit and System, Digital Signal Processing, VLSI, Deep Learning, Machine Learning, Graph Analytics and Computing, etc. Please feel free to contact me through email: bingyizh@usc.edu

I have been invited and served as the reviewer for more than (>) 80 times for various journals and conferences, including:

  • Journal (> 70 times): IEEE Transactions on Very Large Scale Integration Systems (TVLSI); IEEE Transactions on Image Processing (TIP); IET Computer Vision; IET Image Processing; Neurocomputing (NEUCOM); Engineering Applications of Artificial Intelligence (EAAI); Information Sciences; Journal of Electronic Science and Technology; Microelectronics Journal; Microprocessors and Microsystems;

  • Conference (>10 papers): ASICON 2021; ICSICT 2022; IEEE international radar conference 2023;

news

Jun 16, 2023 Our paper “GraphAGILE: An FPGA-based Overlay Accelerator for Low-latency GNN Inference” is accepted by IEEE Transactions on Parallel and Distributed Systems
Jun 4, 2023 Our paper “Exploiting On-chip Heterogeneity of Versal Architecture for GNN Inference Acceleration” is accepted by 33nd International Conference on Field Programmable Logic and Applications (FPL 2023)
May 20, 2023 Excited to share that I have been awarded 1st place for the Outstanding Poster Award at the IPDPS 2023 PhD Forum!
May 8, 2023 I am organizing the FCCM 2023 conference (https://www.fccm.org/) as the Local Arrangements Chair. The conference has finished successfully!
Jan 27, 2023 My paper “Dynasparse: Accelerating GNN Inference through Dynamic Sparsity Exploitation” is accepted by 37th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2023)
Sep 16, 2022 My paper “Low-latency Mini-batch GNN Inference on CPU-FPGA Heterogeneous Platform” is accepted by 2022 International Conference on High Performance Computing, Data, and Analytics (HiPC 2022)
Aug 16, 2022 My paper “Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA” is accepted by 26th Annual IEEE High Performance Extreme Computing Virtual Conference (HPEC 2022)
Jun 14, 2022 My paper “Accurate, Low-latency, Efficient SAR Automatic Target Recognition on FPGA” is accepted by 32nd International Conference on Field Programmable Logic and Applications (FPL 2022)

selected publications

  1. ASAP
    Hardware acceleration of large scale gcn inference
    Bingyi Zhang, Hanqing Zeng, and Viktor Prasanna
    In 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2020
    Code
  2. FCCM
    BoostGCN: A framework for optimizing GCN inference on FPGA
    Bingyi Zhang, Rajgopal Kannan, and Viktor Prasanna
    In 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021
  3. FPGA
    HP-GNN: Generating High Throughput GNN Training Implementation on CPU-FPGA Heterogeneous Platform
    Yi-Chien Lin, Bingyi Zhang, and Viktor Prasanna
    In Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2022
  4. IPDPS
    Model-Architecture Co-Design for High Performance Temporal GNN Inference on FPGA
    Hongkuan Zhou, Bingyi Zhang, Rajgopal Kannan, and 2 more authors
    In 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2022
    arXiv
  5. IPDPS
    Dynasparse: Accelerating GNN Inference through Dynamic Sparsity Exploitation
    Bingyi Zhang, and Viktor Prasanna
    2023 International Parallel and Distributed Processing Symposium, 2023
    arXiv
  6. TPDS
    GraphAGILE: An FPGA-based Overlay Accelerator for Low-latency GNN Inference
    Bingyi Zhang, Hanqing Zeng, and Viktor Prasanna
    IEEE Transactions on Parallel and Distributed Systems, 2023
    arXiv